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    1 st Workshop on Overview and Architecture of ULTRA Sparc T2 Processor

    OpenSparc Workshop in BVBCET was an event to trigger the minds of Hardware Engineers towards OpenSource concept of processor designing, It was the first of its kind in this part of Karnataka

    It was a marathon workshop for 6 Hours extensively covering important aspects of the UltraSPARC T2 Processor.
    Photo Gallery


    Event Details

    Date conducted: 23rd Feb 2008 (Saturday)

    Timings: 11 to 1 PM, 1.30 to 3.30 PM 4.00 to 6.00 PM

    Institutes participated: BVBCET Hubli (29 students)

                                     SDMCET Hubli (15 students)

                                     P.C.Jabin College BCA (5 students)

                                     M.C.A BVBCET (12 students)

    Total Attendance:  61 Students from E&C,IT,E&E,CS,IS,BCA & MCA Branches

    Resource Person: Mr Nasim Hussain from SUN

    Nasim stunned the audience by his expertise and blissful presentation, we felt that we were in some TED Conference!, rather than presenting he inspired the audience and he delivered an eye opener and awakened us to realize the mammoth lag of our curriculum compared to the industrial race.

    The Workshop aimed at presenting various improvisations made over the old mode of processor designing, and an overview and architecture of the UltraSPARC T2 processor was presented.

    Project ideas for the students interested in this sector were also presented. The presentation included only 277 slides!!

    We are planning to have the next version of this workshop which will provide hands on experience on how to

    Break into the Verilog Source code of UltraSPARC T2

    Flirt with the source code.

    Compiling and Building the code

    Contributing/Adding our own module to the source

    RTL Verification

    We are working on arranging the resources (Machines with Solaris loaded, Cadence Tools installed) for this upcoming event.

    Download Slides of Presentation

    Thanking you,

    Karthik Kulkarni

    Campus Ambassador

    SUN Microsystems

    BVBCET Hubli

    Email: kartik.kulkarni@sun.com

    VHDL IMPLEMENTATION OF VEDIC
    MATHEMATICAL SUTRAS
    Vadiraj Sagar*, Shripad Sagar, Sudhindracharya, Vedavyas Mathad, Subhash Kulkarni
    Department of Electronics and Communication Engineering
    Poojya Doddappa Appa College of Engg., Gulbarga – 585 102 Karnataka, India
    Email: {Sagar.Vadiraj, Shripad_sagar}@rediffmail.com, sudhee_j4u@yahoo.com,
    {vedavyasmathad, subhashsk}@gmail.com
    ABSTRACT:
    The “Time” and “area” are the two important constraints in any processor IC design. In any digital design process, these two constraints play a contradictory role and thus there exists a trade-off between with them. Optimizing the two said constraints is a challenging task in the design process.
    Vedic mathematics comes with the sim
    plest and effective algorithms for solving any typical engineering problem. This has motivated to develop a mathematical system standing on the pillars of the “Vedic” principles. Two of the Vedic mathematical sutras, generalized multiplication sutra and squaring sutra, have been optimally designed at simulation level using VHDL. The results are found to be encouraging with the usage of port mapping concept. The design architectures of these sutras promise a long way in bringing out an efficient (in terms of cell usage & delay) arithmetic unit for the future generation processors.
    KEYWORDS:
    Urdhva-Tiryagbhyam, Dvandva-Yoga, VHDL simulation.

    Continue Reading »

    THE IRIS SECURITY SYSTEM

    IRIS
    IRIS

    Humans have traditionally identified each other by their appearance, by the sound and content of their speech, and by context. By using these parts of the body and with the help of “BIOMETRICS” many security systems are being developed. We have many security systems but failed to identify the terrorist hijackers who crashed the aero planes into buildings on ‘September 11’though they were in FBI "watch lists,” To over come some of the defaults of these security systems we have “THE IRIS SECURITY SYSTEM”.

    The iris is an internal organ of the eye — perhaps the only internal organ of the body that is routinely visible from outside — and its patterns are resolvable with good video cameras from distances of up to about a meter. The iris is located behind the cornea of the eye, and behind the aqueous humour, but in front of the lens. Though we have other biometric traits we go for iris technology because of its uniqueness. This is because iris patterns have a high degree of randomness in their structure. This is what makes them unique.

    The main principle of this system depends on the algorithm which encode the iris pattern into an abstract mathematical description called an "Iris Code," which is the bar-code like bit stream This process relies upon two-dimensional wavelets (mathematical functions that are like restricted Fourier components, i.e. sine waves multiplied by Gaussian envelopes to give them locality) which is given as follows

    The result of the wavelet analysis is that any piece of an iris can be said to have a certain phase. The phase coordinates of every part of the iris are quantized to just two bit accuracy — i.e. only the identity of a quadrant of the complex plane is encoded as the representation for each small piece of structure seen in the iris. This "phase sequence" allows an iris pattern to be encoded in a total of 512 bytes worth of information. Whenever a person presents his/her eye to a camera, its Iris Code is computed within a second or less, and then this is compared with all previously enrolled Iris Codes in the relevant database to see whether any of them match. An important point is that the person does not need to assert any identity; the algorithms are powerful enough (and fast enough) to discover their identity, if they have been seen before and enrolled. The speed of database search is about 100,000 Iris Codes per second.

    This ability to be recognized without having first to assert an identity — e.g. by swiping a card, or by typing in a name or a PIN number — is one potential advantage of iris identification for persons who have limited use of arms or hands. This "hands-free" use of iris recognition is possible because the probability of False Matches is so low i.e. about 1/1,200,000 so that the algorithms can "afford" to search large databases exhaustively, rather than just answering a single yes/no question about a claimed identity. In many millions of Iris Code comparisons that have been done in tests by independent laboratories (e.g. the UK’s NPL Labs), so far there has never been a single False match reported.


    As with almost every new technology that seeks to find its place in everyday life, iris recognition has both the potential to be a convenience enhancer (including an access enhancer), but also the potential to be an obstacle or excluder if improperly configured or installed without consultation and guidance from disabled persons. Because it allows hands-free, automatic, rapid and reliable identification of persons, it can facilitate access for persons unable to engage in the standard mechanical transactions of access.

    (Note: This Paper was presented in ICSIP., Signalspot Please Download the paper
    for proper formatting, images,equations and symbols)


    Continue Reading »

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