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The “Time” and “area” are the two important constraints in any processor IC design. In any digital design process, these two constraints play a contradictory role and thus there exists a trade-off between with them. Optimizing the two said constraints is a challenging task in the design process.
Vedic mathematics comes with the sim
plest and effective algorithms for solving any typical engineering problem. This has motivated to develop a mathematical system standing on the pillars of the “Vedic” principles. Two of the Vedic mathematical sutras, generalized multiplication sutra and squaring sutra, have been optimally designed at simulation level using VHDL. The results are found to be encouraging with the usage of port mapping concept. The design architectures of these sutras promise a long way in bringing out an efficient (in terms of cell usage & delay) arithmetic unit for the future generation processors.

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Humans have traditionally
identified
each other by their
appearance, by
the sound and
content of their speech,
and by context. By using
these parts of the body
and with the help of
?BIOMETRICS? many
security systems are being
developed. We have many
security
systems but failed to
identify the terrorist
hijackers who crashed the
aero
planes into buildings on
?September 11?though
they were in FBI “watch
lists,? To
over come some of the
defaults of these security
systems we have ?THE
IRIS
SECURITY SYSTEM?.

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Fig 1. Block diagram of transmission system

ABSTRACT
Watermarking in medical images is a new area of research and some works in this area have been reported world wide recently. Most of the works are on the tamper detection of the images and embedding of the Electronics Patient Record (EPR) data in the medical images. Watermarked [...]

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